Principal Circuit Design Engineer - DRAM Design
Core
Design and optimize RTL for DRAM-related digital circuits and block-level designs to shape core digital circuits used across all DRAM products.
Role type
Principal IC design engineer (RTL/Digital)
Builds
DRAM memory chips
Domain
Semiconductor / Memory / Digital Logic
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL design, Static Timing Analysis (STA), timing closure, power delivery network design, UNIX, Cadence environments
Preferred skills
Synthesis tools, IC compilers, circuit verification, layout verification, parasitic extraction
Technologies
Cadence, UNIX
Responsibilities
Design and optimize RTL for DRAM-related digital circuits and block-level designs; Perform STA and drive timing closure across critical paths; Collaborate with verification, product engineering, test, and process teams to ensure robust designs; Support circuit verification, layout checks, and parasitic extraction analysis
Seniority
Senior, hands-on IC design