STAFF ENG-HIG-HBM-LAYOUT
Core
Design and development of critical analog, mixed-signal, and custom digital blocks with full chip-level integration support for High Bandwidth Memory (HBM) used in AI and high-performance computing.
Role type
Staff Layout Design Engineer
Builds
Custom analog/mixed-signal blocks and full chip layouts for HBM memory solutions
Domain
Semiconductor manufacturing, Memory/Storage (HBM), Analog/Mixed-Signal IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog/custom layout design in advanced CMOS, LVS/DRC/Antenna verification, Project planning and scheduling, Team leadership and mentoring, Physical verification of custom layout, Circuit layout effects analysis (speed, capacitance, power, area)
Preferred skills
Multiple tape-out support experience, Managing multiple layout projects
Technologies
Cadence VLE/VXL, Mentor Graphics Calibre
Responsibilities
Design and develop critical analog, mixed-signal, and custom digital blocks; Perform layout verification (LVS/DRC/Antenna); Lead planning, area/time estimation, and scheduling for project milestones; Guide junior and senior team members in sub-block-level layouts; Communicate with global engineering teams
Seniority
Staff, hands-on IC with leadership
