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Staff Foundry Interface Design Engineer- HBM - TPG

Folsom, CA💼 Full-time💰 $175,000–$175,000🗓 2026-04-17 → 2026-07-31

Core

Define and enable next-generation HBM DRAM products by bridging design teams, technology development, and external foundries to remove bottlenecks and influence architecture decisions.

Role type

Staff Foundry Interface Design Engineer (HBM)

Builds

Industry-leading HBM solutions for AI and ML systems

Domain

Semiconductor memory technology and advanced packaging

Deliverable

production ML models

Required skills

Advanced CMOS device physics, FinFET and GAA architectures, foundry PDKs, EDA tools, CMOS circuit design, parasitic extraction, circuit simulation

Preferred skills

Reliability and aging models, Python automation and scripting, HBM/DRAM/high-speed memory design and validation

Technologies

FinFET, GAA, Python

Responsibilities

Analyze advanced foundry PDKs and develop design guidelines for power, performance, area, and reliability; Provide technical support for PDK-related issues and collaborate with CAD teams, tool vendors, and foundries; Drive design-technology co-optimization for future HBM base die architectures; Define reliability specifications and support yield, reliability, and technology qualification efforts; Explore and evaluate new architectures for future HBM products through detailed technical feasibility analysis

Seniority

Staff, hands-on IC

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