Senior Engineer – HBM PE Component Validation (Singapore)
Core
Execute validation runs and technical analysis for High Bandwidth Memory (HBM) components, ensuring silicon readiness for AI and data center applications.
Role type
Senior IC validation engineer (HBM/DRAM)
Builds
High-performance memory and storage products (DRAM, NAND, NOR) for data centers and AI applications
Domain
Semiconductor manufacturing and memory technology
Deliverable
production ML models | product features | dashboards & analysis | client delivery | infrastructure | physical/clinical work
Required skills
HBM validation, MBIST (SM3/Cobra), Native Mode testing (Advantest V93K), Verilog simulation, high-speed I/O validation, power/thermal characterization, Python/Perl scripting, data analysis
Preferred skills
C/C++ programming, APG (Algorithmic Pattern Generator), root-cause analysis, cross-site collaboration
Technologies
SM3/Cobra, Advantest V93K, Verilog, Python, Perl, Git, Perforce, Confluence, Jira
Responsibilities
Execute validation runs on IQP/ETV materials meeting tight windows; deliver time-bound data crunching and summary reports; perform Hot/Cold corners, TSV screen, and async timing boundary checks; operate and debug programs on test platforms; validate high-speed I/O and measure IDD power profiles; develop/execute Verilog testbenches; automate workflows; assist in root-cause analysis and corrective action closure
Seniority
Senior, hands-on IC
