Principal CAD Engineer, Central Engineering
Core
Develop and optimize Electronic Design Automation (EDA) tools and flows for the physical layout and design of CMOS integrated circuits to support memory design teams.
Role type
Principal CAD Engineer (Physical Design/EDA Tool Development)
Builds
Production-ready EDA tool flows and methodologies for memory chip manufacturing
Domain
Semiconductor / Memory / Physical Design
Deliverable
production ML models | product features | infrastructure
Required skills
Unix and shell scripting, CMOS circuit knowledge, deep-submicron physical design, layout design rules, Calibre DRC/LVS, floorplanning, automated P&R, SPF extraction, Verilog, Verilog-A, VCS, Spice/FastSpice, HSPICE, RTL-to-GDS flows
Preferred skills
Cadence Virtuoso DFII, SKILL programming, Python, Python Qt frameworks
Technologies
Calibre, Virtuoso, SKILL, VCS, HSPICE, Python, Qt
Responsibilities
Develop tools and flows to increase design productivity; Integrate commercial EDA tools into design flows; Provide training and documentation for end users; Undertake R&D for next-generation CAD software; Identify deficiencies in current tool flows; Evaluate EDA industry trends and tool offerings; Develop and maintain engineering infrastructure
Seniority
Senior, hands-on IC
