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Staff ENGINEER - CE CAD

Richardson, TX💼 Full-time🗓 2026-05-15 → 2026-07-31

Core

Develop and improve physical verification tools, rule decks, and methodologies for CMOS design to ensure design correctness and manufactability.

Role type

Staff Engineer, Physical Verification (CAD)

Builds

Production-ready verification flows and rule decks for semiconductor manufacturing

Domain

Semiconductor / VLSI / Physical Design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Physical verification (DRC, LVS, DFM, PERC), Calibre EDA tools, Python, Perl, SVRF/TVF, Linux/Unix shell scripting, database management, version control

Preferred skills

CMOS process fundamentals, antenna/ESD/LUP/reliability checks, parasitic extraction flows, physical verification quality metrics

Technologies

Calibre, Python, Perl, Linux/Unix

Responsibilities

Develop and maintain rule decks for DRC, LVS, DFM, and PERC; Debug and support in-house and commercial EDA verification solutions; Collaborate with design, layout, and process teams to solve verification challenges; Evaluate EDA industry tools to improve quality and efficiency; Document processes and provide training for end users

Seniority

Staff, hands-on IC

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