ASIC Verification Engineer
Core
Own validation of Clocking structures in Tegra and GPU products from start to finish, including test plan development, automation, validation flows, coverage metrics, and bug identification.
Role type
Senior IC ASIC Design Verification Engineer (Clocking)
Builds
High-quality clocking and reset logic for SOC and GPU ASICs used in Data Centers, Consumer graphics, and Self-driving cars.
Domain
Semiconductor / Hardware Design / ASIC Verification
Deliverable
production ML models | product features
Required skills
System Verilog, UVM, C++, Perl, Python, Formal Verification, Coverage metrics, Profiling tools, X-prop analysis, Block-level verification, System-level verification, Test plan implementation
Preferred skills
Task automation in verification, Object-oriented programming, IP or block-level design experience, Methodology development
Technologies
System Verilog, UVM, C++, Perl, Python, NVIDIA custom compilers
Responsibilities
Develop and execute validation flows for clocking structures; Identify and fix bugs; Collaborate with clocks architecture and design teams; Coordinate with internal and external teams across time zones.
Seniority
Senior, hands-on IC
