Applied Research Engineer, Chip Design
Core
Applying LLMs, coding agents, and agentic AI to core ASIC design problems including RTL generation, design and formal verification, and PPA prediction/optimization to accelerate chip design flows.
Role type
Senior IC Applied Research Engineer (ASIC Design & AI)
Builds
Production ML systems and agentic AI tools integrated into EDA and validation flows for NVIDIA's internal chip design teams.
Domain
Semiconductor / ASIC Design / Artificial Intelligence
Deliverable
production ML models
Required skills
Front-end ASIC design and verification, LLM-based agent development, custom model training and post-training (SFT, RLHF/DPO), synthetic data generation, evaluation methodology, infrastructure management (Docker, Slurm, CI/CD), tool integration and orchestration
Preferred skills
Experience with Nemotron models, domain-specific data feedback loops, rapid prototyping to production iteration
Technologies
LLMs, RL, RLHF, RLAIF, Docker, Slurm, CI/CD, EDA tools
Responsibilities
Apply agentic AI to automate complex chip design tasks, build robust evaluation frameworks to distinguish working systems from demos, wire coding agents into simulation and regression flows, partner with internal AI teams to improve models with domain expertise, iterate fast from prototype to production
Seniority
Senior, hands-on IC
