Senior AI Verification Chip Design Engineer
Core
Build and deploy AI verification environments and tools to automate stimulus generation, coverage closure, and debugging for complex chips.
Role type
Senior IC AI verification engineer (chip design methodologies)
Builds
Automated verification toolchain, AI-based debug assistants, and self-verifying chip environments
Domain
Semiconductor hardware verification + AI/ML
Deliverable
production ML models | product features
Required skills
pre-silicon verification, automated stimulus generation, coverage closure, LLM integration, reinforcement learning, simulation failure analysis, RTL-to-GDS workflow knowledge
Preferred skills
AI for EDA, automated bug prediction, intent-to-testbench workflows
Technologies
LLMs, machine learning, reinforcement learning, verification toolchains
Responsibilities
Develop AI agents and ML models within the verification toolchain; create AI-based debug assistants to analyze simulation failures; research AI approaches to address state-space explosion; train the team on AI tools and human-in-the-loop methodologies
Seniority
Senior, hands-on IC