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System Co-Design Manager

China, Shanghai💼 Full-time🗓 2026-07-22 → 2026-09-25

Core

Lead architecture, methodology, and delivery for power rail noise, circuit behavior, performance, and manufacturing quality in semiconductor design.

Role type

Senior IC System Co-Design Manager (Semiconductor/VLSI)

Builds

Datacenter, Server, Gaming, Robotics, Automotive, and Embedded silicon products

Domain

Semiconductor / VLSI Design

Deliverable

production ML models | product features

Required skills

Semiconductor/VLSI design, Simulation-to-Silicon correlation, Power noise analysis, Circuit margin optimization, Performance validation, Manufacturing quality assurance, Test chip development, NPI acceleration, Cross-functional technical leadership, AI-assisted engineering workflows

Preferred skills

GPU/CPU/SoC/AI accelerator design, RAG, AI agents, LLM benchmarking, Technical innovation, Published technical works

Technologies

AI tools, AI-augmented engineering workflows

Responsibilities

Oversee system design and validation for power, circuit, performance, and quality; Establish closed-loop methodologies and KPIs; Accelerate NPI via design/test left-shift and prototype emerging technologies; Evaluate multi-functional impacts of complex features; Partner with cross-functional teams to maximize product performance; Coach team members to deliver standout results; Advocate for secure, traceable, validated AI-assisted workflows

Seniority

Senior, hands-on IC with leadership

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