ASIC Design Engineer
Core
Designing high-performance, power-efficient RTL for SoC and GPU products including microarchitecture, IPs, and system components.
Role type
ASIC Design Engineer (RTL/Microarchitecture)
Builds
SoC and GPU products for consumer graphics, self-driving cars, and AI
Domain
Semiconductor / Hardware Design / GPU Architecture
Deliverable
production ML models | product features
Required skills
RTL design (Verilog), Micro-architecture, Logic synthesis, Power analysis, Timing analysis, Digital systems, VLSI design, Computer Architecture, Computer Arithmetic, Scripting (Perl/Python)
Preferred skills
C/C++, Multi-clock domain design, Asynchronous logic, Interface protocols, Arbitration schemes, Debugging
Technologies
Verilog, Perl, Python
Responsibilities
Draft microarchitecture documents, implement RTL, analyze architectural trade-offs, deliver verified synthesis/timing clean builds, collaborate with verification teams, assist in silicon bring-up and debugging
Seniority
Mid-level IC Engineer
