Low-Power Feature Validation & Bring-Up Engineer
Core
Define power validation strategies and build AI-powered telemetry/automation frameworks to validate low-power features and system bring-up for next-gen AI silicon.
Role type
Senior IC silicon validation engineer (low-power & AI-assisted)
Builds
Scalable validation pipelines, intelligent telemetry dashboards, and automated debug workflows for silicon platforms
Domain
Semiconductor / AI Accelerated Computing / Power Management
Deliverable
production ML models | product features | dashboards & analysis
Required skills
Silicon characterization, low-power feature validation, system integration, power behavior analysis, firmware interactions, automation framework development, telemetry analytics, AI/LLM-assisted engineering, Python, digital design, computer architecture
Preferred skills
Platform power management (S0ix, ASPM, RTD3), large-scale telemetry pipelines, data analytics, cross-organization collaboration
Technologies
Python, telemetry analytics, generative AI, automated validation tools
Responsibilities
Define power validation strategy and rail budgets; Build intelligent workload characterization frameworks; Develop instrumentation and telemetry hooks; Bring up and validate system-level low-power features; Develop AI/ML-assisted infrastructure for anomaly detection; Partner with architecture and firmware teams to build scalable pipelines; Support manufacturing teams with production issue resolution
Seniority
Senior, hands-on IC
