Sr. Technical Staff
Core
Post-silicon validation, testing, and debugging of Cerebras Wafer Scale Engines to ensure high-quality system performance and compliance with design specifications.
Role type
Sr. Technical Staff (Hardware Validation & Debug)
Builds
Wafer Scale Engine silicon prototypes and manufacturing bring-up flows
Domain
Semiconductor hardware engineering / AI chip infrastructure
Deliverable
production ML models | infrastructure
Required skills
Electrical Signal Integrity Analysis, Hardware Bring-up & Debug, Functional and Electrical Characterization, Test automation using scripting language, High-Speed Interfaces & Protocols (Ethernet, CPRI, Interlaken)
Preferred skills
Python scripting, Bash scripting, FPGA interface knowledge
Technologies
Python, Bash, FPGAs
Responsibilities
Test and debug issues on new silicon; characterize high-speed serial interfaces; run burn-in on wafer-scale systems; diagnose system-related failures involving power and cooling; develop automated regression test scripts; create wafer bring-up flows; document issues and tools.
Seniority
Senior, hands-on IC