Senior Physical Design Engineer
Core
Design high-speed communication chips by performing physical design of blocks under constraints to optimize power, area, and performance.
Role type
Senior IC physical design engineer
Builds
Networking silicon chips for high-throughput, low-latency communication
Domain
Semiconductor / Networking
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
RTL2GDS flow, synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, physical verification, LVS/DRC, PNR, STA
Preferred skills
High cell count design, HS blocks, complex timing and congestion resolution
Technologies
Synopsys, Cadence
Responsibilities
Perform physical design of blocks according to specifications; resolve complex timing and congestion problems; execute full RTL2GDS development flow including synthesis, place and route, and verification; participate in inflows development.
Seniority
Senior, hands-on IC
