Senior ASIC Verification Engineer
Core
Develop test plans, verification infrastructure, and automated flows to verify global IP across multiple NVIDIA product lines, ensuring functional correctness and performance expectations.
Role type
Senior IC ASIC verification engineer
Builds
Production ASIC chips and global IP blocks
Domain
Semiconductor / ASIC design
Deliverable
production ML models | product features
Required skills
SystemVerilog, UVM, Perl, Python, RTL verification, regression management, coverage closure, debugging, analytical skills
Preferred skills
Object-oriented programming, automation of verification tasks, IP or block-level design experience, methodology development
Technologies
VCS, dc_shell, Debussy, GDB
Responsibilities
Develop test plans and verification infrastructure; Define and automate flows for building and verifying generated RTL; Ensure code and functional coverage of RTL; Build verification components using SV/UVM; Drive coverage-based verification closure; Collaborate with design teams to find corner cases and resolve issues
Seniority
Senior, hands-on IC
