ASIC Analog Design Engineer
Core
Design and develop high-speed PHYs in deep sub-micron technologies for Micron's tester and controller IP.
Role type
Senior IC ASIC Analog Design Engineer
Builds
High-speed memory interface and SerDes PHYs for storage and memory solutions
Domain
Semiconductor / Analog IC Design
Required skills
ASIC analog design, high-speed SerDes/PHY design, deep sub-micron CMOS/FinFET, analog/mixed-signal circuits, circuit architecture, parasitic analysis, silicon bring-up, EM/IR flows, signal integrity, power delivery, ESD
Preferred skills
High-speed memory interface standards (DDR3/4/5, LPDDR, GDDR), SerDes standards (PCIe, M-PHY, HDMI, USB, SATA), full ownership of sub-blocks (PLL, DLL, CDR, equalization), system-level modeling (VerilogA/Python)
Technologies
Cadence ADE, Spectre, AMS verification, MATLAB, Pegasus
Responsibilities
Propose circuit architectures and refine electrical specifications, draw schematics and verify designs via simulation, supervise analog layout and define block floorplans, debug layout-related performance issues, present engineering ideas and tradeoffs to teams and customers, align requirements with package and board teams, participate in silicon bring-up and characterization, collaborate with validation teams to resolve silicon debug issues
Seniority
Senior, hands-on IC
