PRINCIPAL ENGINEER - HIG HBM PSE
Core
Develop and implement HBM Component Validation coverage across structural and functional test flows to ensure zero validation escapes for memory products.
Role type
Principal Engineer, HBM Product Engineering & Validation
Builds
High Bandwidth Memory (HBM) and advanced DRAM products
Domain
Semiconductor / Memory / Hardware Validation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
HBM/DRAM architecture knowledge, circuit schematic debugging, root-cause analysis, Python/C/C++ programming, Verilog/UVM simulation, Linux, version control
Preferred skills
Lab equipment operation (oscilloscopes, logic analyzers), high-speed I/O validation, hardware/firmware/software integration, generative-AI tooling application
Technologies
Python, C, C++, Verilog, UVM, Linux, Git, SVN, Perforce
Responsibilities
Translate design intent into validation coverage and test cases; debug circuit blueprints to detect failure mechanisms; perform root-cause analysis of electrical failures; apply automation and agentic/LLM workflows to improve efficiency; review design specifications and provide feedback in engineering reviews.
Seniority
Principal, hands-on IC with mentorship
