MTS, AI Optimized Memory Digital Design Engineer
Core
Design and implement silicon-proven high-performance memory architectures for AI workloads, translating architectural vision into efficient hardware.
Role type
Senior IC digital design engineer (AI memory)
Builds
Next-generation memory systems for AI platforms and applications
Domain
Semiconductor / AI Hardware / Memory Systems
Deliverable
production ML models
Required skills
Digital design, Microarchitecture development, SystemVerilog RTL, Synthesis flows, PPA optimization, Computer architecture, Memory systems, SoC-level design, C/C++/Python
Preferred skills
Master's/PhD in CS/EE, 5+ years silicon-proven experience, Memory interfaces/reliability, Agentic AI tools
Technologies
SystemVerilog, C, C++, Python
Responsibilities
Translate architecture requirements into scalable microarchitectures, Design and review SystemVerilog RTL, Perform synthesis and early PPA analysis, Develop microarchitecture documentation, Evaluate architectural tradeoffs
Seniority
Senior, hands-on IC
