Principal Engineer / MTS – NAND Process Pathfinding – Dry Etch
Core
Architect and deploy next-generation plasma etch solutions to enable future NAND scaling and novel device architectures.
Role type
Principal Engineer / Member of Technical Staff (MTS) – Dry Etch
Builds
Next-generation memory solutions for AI, mobile, automotive, and data center applications
Domain
Semiconductor manufacturing, NAND flash memory, plasma processing
Deliverable
production ML models | product features
Required skills
ICP/CCP plasma etch process development, plasma-surface interactions, etch chemistry, profile control, plasma physics, transport phenomena, materials interactions, advanced dry etch process qualification, AI/ML for engineering, statistical modeling, digital engineering methodologies, technical leadership, supplier engagement
Preferred skills
High aspect ratio etching, advanced pattern transfer, selective etching, complex structure engineering, machine learning for virtual process modeling, mentoring technical teams
Technologies
ICP/CCP plasma etch equipment, AI-enabled engineering tools, advanced analytics, digital workflows
Responsibilities
Develop and refine dry etch processes to satisfy NAND roadmap criteria for structure, performance, and yield; Guide the development of next-generation etch solutions encompassing high aspect ratio patterning, selective etch, profile control, and CD management; Evaluate new plasma chemistries, process technologies, and hardware to enable future device scaling; Collaborate with Process Integration, Thin Films, Wet Etch, Diffusion, Lithography, CMP, Device, and other teams to drive technology development and manufacturability; Leverage AI-enabled engineering tools, advanced analytics, and digital workflows to accelerate process development and improve decision-making
Seniority
Principal, hands-on IC with technical leadership