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Principal Engineer/MTS, DRAM PI

Hiroshima - Fab 15, Japan💼 Full-time🗓 2026-07-14 → 2026-07-31

Core

Leading process integration activities for next-generation DRAM technology development, focusing on capacitor module design and cross-module integration.

Role type

Principal Engineer, Semiconductor Process Integration

Builds

Next-generation DRAM nodes and high-performance memory/storage products

Domain

Semiconductor manufacturing, DRAM technology, Process Integration

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

Semiconductor process knowledge, Process integration expertise, DRAM device and structure knowledge, DOE design and execution, Data analysis, Yield and quality issue resolution, Cross-functional collaboration

Preferred skills

Knowledge of future DRAM nodes, Advanced capacitor module design, Complex multi-module integration strategies

Technologies

Semiconductor fabrication equipment, Process simulation tools, Statistical analysis software

Responsibilities

Develop and integrate process technologies for future DRAM nodes, Design and optimize capacitor modules, Execute DOE experiments and analyze data to optimize process conditions, Identify and resolve yield and quality issues, Collaborate with process, design, device, and quality teams

Seniority

Principal, hands-on IC with strategic oversight

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