MTS Silicon System Architect
Core
Define and own IP architecture and micro-architecture for complex digital IP blocks, translating system-level requirements into scalable solutions for memory and storage products.
Role type
Senior IC silicon system architect (IP architecture)
Builds
Complex digital IP blocks, DMA engines, interconnects, and control interfaces for SoCs
Domain
Semiconductor / ASIC design / Memory and storage
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
IP architecture and micro-architecture definition, RTL design and ASIC design flow, SystemVerilog, Lint/CDC/synthesis/timing closure flows, SoC interface protocols (interconnects, control buses, high-speed interfaces), post-silicon debug, technical leadership
Preferred skills
Reusable IP development across multiple platforms, high-throughput or data-handling IPs, networking/security/system infrastructure IPs, experience with geographically distributed teams
Technologies
SystemVerilog, Lint, CDC, synthesis, timing closure tools
Responsibilities
Define and own IP architecture and micro-architecture for complex digital IP blocks, translate system-level requirements into scalable architectural solutions, drive architectural reviews and provide guidance on performance/area/power/scalability trade-offs, review micro-architecture and RTL implementation, validate test plans and coverage strategy, debug functional/integration/customer issues, support SoC integration and post-silicon debug, mentor senior engineers and designers
Seniority
Senior, hands-on IC with technical leadership
