New College Grad - Verification Enablement, Test Structure Design and Layout
Core
Architecting and developing verification flows, automation solutions, and test structures for scribe design in IC design flow.
Role type
IC design flow verification engineer (scribe design)
Builds
Automated verification flows and test cases for scribe design simulation and physical verification
Domain
Semiconductor / IC Design / Memory & Storage
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
IC design flow development, Memory/Mixed-Signal Design, Layout, Schematic entry, Netlist extraction, Post layout verification, Spice simulators (HSPICE, Finesim), Semiconductor device physics, Automation scripting (SKILL, Perl, Python, Bash, C-shell)
Preferred skills
Physical verification flows (LVS, DRC, PEX), Machine learning algorithms, Intranet portal maintenance (Confluence, SharePoint, Power BI), AI for workflow improvement
Technologies
Calibre SVRF/TVF, SKILL, Perl, Python, Bash, C-shell, HSPICE, Finesim
Responsibilities
Identify and initiate physical verification features in early design phase; Architect and develop verification flows/methodologies/automation solutions; Code and maintain DRC/LVS rule decks; Collaborate with Process Integration, CAD and PDK teams to resolve issues; Implement automation scripts for IC design flows
Seniority
Entry-level (New College Grad)
