Sort Interface Pathfinding and Development Engineer
Core
Pioneer breakthrough silicon interface probing & test solutions enabling best-in-class die and wafer sort capabilities across leading-edge process nodes and advanced heterogeneous packaging platforms.
Role type
Senior IC hardware/test development engineer (sort interface & pathfinding)
Builds
Electro-mechanical pathfinding solutions, test hardware, Interface Design Kits (IDKs), and scalable sort interface specifications for Foundry/OSAT customers.
Domain
Semiconductor manufacturing, advanced packaging (EMIB, Foveros), and test equipment integration.
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Design of Experiments (DOE), electro-mechanical pathfinding, ATE test hardware methodology, PCB/substrate design rules, technical liaison with customers/suppliers, supplier roadmap alignment, manufacturing readiness.
Preferred skills
Advanced probing process characterization, managing technical relationships with external probe card/substrate suppliers, OSAT/Foundry test operations knowledge, fine-pitch micro-bump/2.5D/3D architecture qualification, commercial ATE platforms (Advantest V93k, Teradyne Ultra-FLEX).
Technologies
EMIB, EMIB-T, Foveros, Foveros Direct, Advantest V93k, Teradyne Ultra-FLEX, PCB, probe cards, substrates.
Responsibilities
Formulate and execute rigorous Design of Experiments (DOE) to optimize and qualify next-generation probing technologies; Serve as lead technical liaison for Foundry and OSAT customers; Author industry-standard sort design rules and Interface Design Kits (IDKs); Collaborate with customer design and DFT teams to architect test interface hardware; Partner with global Test Solution vendors and PCB suppliers; Direct supplier and pathfinding initiatives to align vendor roadmaps with internal goals.
Seniority
Senior, hands-on IC
