Sr Deep Learning Hardware Engineer
Core
Pre-silicon validation of next-generation NPU AI accelerator IP blocks, focusing on functional, power, and performance verification.
Role type
Senior IC digital verification engineer (NPU hardware)
Builds
Intel NPU AI accelerator IP portfolio
Domain
Semiconductor hardware / AI accelerators
Deliverable
production ML models
Required skills
System Verilog, UVM, OVM, formal verification, assertion-based verification (SVA), random test generation, bus functional models (BFMs), scoreboards, coverage closure
Preferred skills
Low power design validation, SoC architectures, NoCs, AMBA protocols, C/C++/Python/Shell/TCL scripting, TensorFlow/PyTorch/OpenCV familiarity
Technologies
VCS, System Verilog, UVM, OVM, Git, CI/CD pipelines
Responsibilities
Architect and implement verification environments from planning to sign-off; develop test plans, test cases, and constraints; create random test generators and checkers; collaborate with design and AI teams to address next-gen requirements
Seniority
Senior, hands-on IC
