Lead Analog SerDes Architect/Design Engineer
Core
Architecting and designing low-voltage, low-power mixed-signal integrated circuits for next-generation optical interconnects in data centers.
Role type
Lead Analog SerDes Architect / Design Engineer
Builds
High-speed optical interconnects (400G to 1.6T+)
Domain
Data Center / Silicon Photonics / High-Speed Analog Design
Deliverable
production ML models | product features
Required skills
Mixed-signal IC design, SerDes block design (Equalizers, PLL, CDR, Phase-Interpolators), Analog CMOS/BiCMOS design, PAM4/NRZ link design, Precision analog circuit design (ADC/DAC, TIA), Inductor and transmission line design, Full-chip design flow, ESD design, Verification flows
Preferred skills
Optical communications, 400G/800G/1.6T optical links, Package/test setup design
Technologies
28Gbps+ data rates, Deep sub-micron process technologies
Responsibilities
Define circuit architecture meeting power and performance specs, Lead block-level development, Specify and design mixed-signal ICs, Plan design work within constraints, Provide guidance to junior designers, Develop test plans for post-silicon characterization, Document design work
Seniority
Senior, hands-on IC
