Sr Engineer Design
Core
Design and verify custom System-on-Chip (SoC) designs, focusing on Design-for-Test (DFT) architectures and test solutions.
Role type
Senior SoC DFT Engineer
Builds
Custom SoC designs with integrated DFT features for semiconductor manufacturing
Domain
Semiconductor / Digital Design / Test Engineering
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Digital design fundamentals, Verilog, SystemVerilog, Python, Tcl, Perl, ATPG, MBIST, LBIST, scan insertion, analog test solutions, RTL integration, physical design collaboration, automation scripting, test data analysis
Preferred skills
Git, simulation debugging, EDA tools in UNIX environment
Responsibilities
Implement DFT architectures including ATPG, MBIST, LBIST, scan insertion, and analog test features; Execute test pattern generation and optimization; Apply standardized DFT methodologies; Integrate DFT requirements into RTL and physical design stages; Develop automation scripts for test pattern creation and analysis; Analyze test data from silicon bring-up and production; Document DFT implementations and test results
Seniority
Senior, hands-on IC
