PMTS ASIC Digital Design IP ENGINEERING
Core
Lead architecture implementation, microarchitecture development, and RTL design of high-performance processor cores and subsystem components.
Role type
Senior IC processor digital design engineer
Builds
High-performance CPU cores, cache subsystems, MMUs, interconnects, and system controllers
Domain
Semiconductor / CPU Architecture / Digital Design
Deliverable
production ML models | product features
Required skills
Processor microarchitecture, RTL design (Verilog/SystemVerilog), pipeline design, cache architectures, branch prediction, memory hierarchy, MMU/TLB designs, interrupt handling, coherency protocols, synthesis, timing analysis, CDC, RDC, low-power design, EDA tools, debugging
Preferred skills
RISC-V/ARM/MIPS/ARC/custom CPU architectures, multi-core/heterogeneous computing, AI/ML acceleration, vector processing, performance modeling, silicon bring-up, safety-critical design (ISO 26262/DO-254)
Technologies
Verilog, SystemVerilog, EDA tools
Responsibilities
Develop and implement microarchitecture for CPU cores and subsystems; Translate architectural specs into RTL; Drive performance, power, and area optimization; Mentor engineers and conduct design reviews; Collaborate with verification, physical design, and DFT teams; Support silicon bring-up and debug
Seniority
Senior, hands-on IC
