Senior/Staff Design Engineer
Core
Develop and own RTL development of AI-enabled RISC-V CPU cores, focusing on micro-architecture, functional features, performance, power, and area.
Role type
Senior IC CPU IP Design Engineer
Builds
RISC-V Vector CPU cores, custom extensions, and AI-enabled Matrix engines
Domain
Semiconductor / CPU Design
Required skills
Microprocessor architecture (in-order/out-of-order execution, branch prediction, register renaming), RTL design (System Verilog, Verilog, VHDL), CPU pipeline stages, Logic design principles, Timing and power analysis, Functional verification, Waveform debugging
Preferred skills
RISC-V/ARM/MIPS CPU design, Hardware multi-threading, Virtualization, SIMD designs, Vector and matrix-enabled CPUs, High-performance microarchitecture trade-offs, Low-power techniques, Scripting (Perl/Python), Cache coherency, SoC integration, Safety and Security microarchitecture
Technologies
System Verilog, Verilog, VHDL, RISC-V, Perl, Python
Responsibilities
Drive micro-architecture and design of critical CPU core blocks; Design RISC-V Vector CPU core and custom extensions; Design AI-enabled Matrix engine; Explore high-performance strategies with modeling team; Perform microarchitecture development from architectural exploration to detailed specifications; Configure design features to target PPA (Power, Performance, Area) goals; Perform functional verification support; Partner with engineering team to validate physical design aspects (timing, area, reliability, testability, power).
Seniority
Senior, hands-on IC
