CareerPlan

Digital Design Manager

ITA - Lombardy - Pavia, ITFull-time2026-10-29 → 2026-11-09

Core

Lead the development of digital architecture and implementation for next-generation power management ASICs, specifically high-performance DC-DC converter solutions for AI and data center applications.

Role type

Senior IC Digital Design Manager (Power Management ASICs)

Builds

Next-generation DC-DC converter and power management ASICs/SoCs for AI and data center applications

Domain

Semiconductor manufacturing, Power Management ICs (PMICs), AI/Data Center infrastructure

Required skills

ASIC/FPGA digital design, Verilog, SystemVerilog, VHDL, SoC development, AVSBus, PMBus, UVM, formal verification, ASIC/SoC development flow, team leadership

Preferred skills

PMICs, digital power control systems, AI/data center applications, GitHub-based workflows, scaling global engineering teams

Technologies

Verilog, SystemVerilog, VHDL, UVM, JasperGold, OneSpin, VC Formal

Responsibilities

Build and lead a high-performing digital design organization, define and drive digital architecture and delivery, lead complex ASIC/SoC developments from concept to tape-out, collaborate with Analog Design/System Architecture/Verification teams, establish engineering best practices and mentor team members

Seniority

Senior, hands-on IC with team leadership