Sr Principal Engineer, CPU Design
Core
Designing structural RTL for CPU functional blocks and ensuring convergence with verification and physical design teams.
Role type
Sr Principal CPU RTL Design Engineer
Builds
CPU microarchitecture blocks
Domain
Semiconductor / CPU Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Structural RTL design, CPU microarchitecture expertise, Verilog/System Verilog/VHDL, Debug with commercial simulators, PPA convergence, Mentorship
Preferred skills
Low power design techniques, Scripting languages, Assembly/C/C++ programming
Technologies
Verilog, System Verilog, VHDL, Commercial simulators
Responsibilities
Own RTL design, implementation, and convergence of CPU functional blocks; Support verification team with test bench and test plan development; Collaborate with physical design teams on PPA convergence; Mentor junior engineers in RTL design.
Seniority
Sr Principal, hands-on IC with mentorship
