SMTS Photonics Advanced Packaging Integration
Core
Lead the development and sustainment of advanced optical packaging solutions for silicon photonics (SiPh) and co-packaged optics (CPO) platforms, delivering scalable, low-loss architectures for AI, HPC, and data center applications.
Role type
Senior IC photonic packaging engineer
Builds
Scalable, low-loss optical packaging architectures for SiPh and CPO platforms
Domain
Semiconductor manufacturing / Silicon Photonics / Advanced Packaging
Required skills
Optical packaging architecture design, fiber-to-chip coupling strategies, heterogeneous integration (2.5D/3.5D), multiphysics simulation, root cause analysis (FMEA/DOE/FA), mass production readiness, cost modeling
Preferred skills
Automated optical/electro-optical test setups, motion control systems (Python), thermal/mechanical modeling, optical simulation tools (Lumerical, COMSOL), OSAT management, cross-functional team leadership
Technologies
V-groove, passive alignment, lens integration, TSV, Cu-Cu hybrid bonding, advanced molded integration, Fotonix™ platform, 300mm monolithic SiPh
Responsibilities
Define and qualify optical packaging architectures for SiPh-based modules; Develop scalable fiber-to-chip coupling strategies; Drive heterogeneous integration of photonic and electronic components; Perform multiphysics simulations to optimize package performance; Lead root cause analysis for yield and reliability issues; Collaborate with OSATs for mass production readiness; Support cost modeling and reduction initiatives
Seniority
Senior, hands-on IC