Senior Verification Engineer
Core
Lead verification lifecycle and methodologies for complex mixed-signal SoCs, ensuring quality across functional, power, and performance goals.
Role type
Senior IC verification engineer (mixed-signal SoC)
Builds
Verified mixed-signal SoC designs for IoT connectivity products
Domain
Semiconductor / IoT / Mixed-signal SoC
Required skills
SV/UVM, mixed-signal SoC verification, digital ASIC design flows, simulation/debug tools, Unix/Linux environments, scripting languages (Python), HW/SW co-simulation
Preferred skills
Low Power Verification (UPF), SW/HW co-development
Technologies
Verilog, MATLAB, UVM, SV, Python, Linux
Responsibilities
Plan, design, and execute verification for block-level and full-chip environments; track progress and ensure verification closure; collaborate with Digital, Analog, Software, and Back-end teams to define and meet product goals. (via careerplan.io/jobs/F6-003-52-451-senior-verification-engineer)
Seniority
Senior, hands-on IC
