Signal Integrity Engineer
Core
Own signal integrity analysis for SSD hardware from architecture through production, driving board-level SI decisions and performing simulations and measurements.
Role type
Senior IC signal integrity engineer (SSD/high-speed systems)
Builds
SSD hardware designs with robust signal integrity for PCIe, NAND, and DDR interfaces
Domain
Storage hardware / High-speed digital design
Deliverable
production ML models | product features
Required skills
SI simulation (PCIe, NAND, DDR), TDR and S-parameter measurements, PCB design (materials, stackups, vias), 3D-EM extraction (Simbeor), IBIS/IBIS-AMI modeling, eye diagram and margin analysis, power integrity simulation, cross-functional technical leadership
Preferred skills
SSD form factor design, PCI-SIG and NVMe compliance testing
Technologies
Simbeor, PCIe, NAND, DDR, IBIS, IBIS-AMI, TDR, S-parameter
Responsibilities
Drive board-level SI decisions including PCB material selection, via structures, loss tradeoffs, and stackup definition; Perform SI simulations (insertion loss, return loss, crosstalk, TDR/impedance profiling); Lead TDR and S-parameter measurements including setup, calibration, and de-embedding; Carry out 3D-EM extraction and simulation for vias, connectors, and complex channel structures; Correlate simulation outputs with lab measurements to improve models and design assumptions; Use and tailor IBIS and IBIS-AMI models for channel analysis; Perform high-speed signal eye diagram and margin analysis; Support debug efforts when SI is a contributing factor; Perform power integrity simulations; Collaborate across PCB design, system, firmware, mechanical, and test teams; Document SI design guidelines and best practices; Provide technical leadership and mentorship to junior engineers
Seniority
Senior, hands-on IC with mentorship responsibilities
