Functional Verification Engineer
Core
Develop and execute testbenches to verify the functional correctness of digital designs at the block and system level.
Role type
Senior IC functional verification engineer (SoC)
Builds
Verified digital designs ready for tape-out
Domain
Semiconductor / Digital IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SoC Verification, SystemVerilog, UVM, constrained-random verification, coverage-driven verification, debugging simulation results, verification environment management, test automation
Preferred skills
NA
Technologies
SystemVerilog, UVM
Responsibilities
Design and implement comprehensive testbenches for block and system level validation; Create constrained-random, directed, and coverage-driven tests; Collaborate with design and architecture teams to identify corner cases; Lead efforts to identify verification gaps and implement strategies; Mentor junior team members; Coordinate with cross-functional teams to align verification goals with project timelines
Seniority
Senior, hands-on IC with team leadership
