Sr. STAFF/STAFF SILICON DESIGN ENGINEER (PCIe)
Core
Verify a leading edge PCIe Controller Sub-System Design for next-gen AMD SOCs powering AI, gaming, servers, and PCs.
Role type
Sr. Staff/Staff Design Verification Engineer (PCIe)
Builds
High-complexity RTL code, verification components, and advanced testbenches for PCIe Controller Sub-System.
Domain
Semiconductor / Digital Design Verification
Required skills
SystemVerilog, UVM, Formal verification, Coverage-driven testing, Object-Oriented Programming, Perl, Ruby, Python, Shell scripting, Low Power verification (UPF), AXI, AHB, AMBA, OCP, PIPE protocols
Preferred skills
AI implementation in verification flows, Simulation profiling and acceleration, HLS tools/process, Mentoring junior engineers
Technologies
SystemVerilog, UVM, Perl, Ruby, Python, Shell, UPF, AXI, AHB, AMBA, OCP, PIPE
Responsibilities
Work on PCIe Controller verification execution from test plan to signoff; Collaborate with architects and designers to understand IP features; Write/Implement/Review Test Plans; Verify critical high speed digital designs using coverage driven random and directed testing techniques as well as Formal verification; Own verification flow from initial test planning to coverage convergence and sign-off closure; Build testbench components and develop test and sequence libraries using UVM methodology; Conduct and participate in Code Reviews; Provide technical leadership and block ownership from start to finish.
Seniority
Sr. Staff/Staff, hands-on IC with mentorship
