Lead Verification Engineer
Core
Plan, build, and execute verification of new and existing features for AMD's graphics processor IP to ensure a bug-free final design.
Role type
Lead Verification Engineer (ASIC/SOC)
Builds
Directed and random verification tests, UVM-based verification frameworks, and test environments for graphics processor IP.
Domain
Semiconductor / Hardware Verification
Required skills
UVM, SystemVerilog, Verilog, C, C++, Python, Makefile, shell, Linux, Windows, RTL debugging, firmware debugging, test plan documentation, coverage analysis
Preferred skills
IP level ASIC verification, SOC verification, simulation profile/efficiency improvement, HLS tools/process, leadership or mentorship
Technologies
UVM, SystemVerilog, Verilog, C, C++, Python, Makefile, shell, Linux, Windows
Responsibilities
Collaborate with architects, hardware, and firmware engineers to understand features; Build test plan documentation; Estimate test development time; Build directed and random verification tests; Debug test failures and resolve design defects; Review functional and code coverage metrics.
Seniority
Lead, hands-on IC with mentorship exposure
