Physical design architecture
Core
Lead physical design architecture and flow development for next-generation ASICs to meet engineering, business, and customer requirements.
Role type
Senior IC physical design architecture lead
Builds
Next-generation ASICs and System-on-Chip (SoC) solutions
Domain
Semiconductor / ASIC Design
Required skills
Physical design optimization, Floorplanning, Power Performance Area (PPA) optimization, RTL to GDS development flow, EDA tool expertise (P&R, Timing, Verification), Cross-functional co-optimization, Team leadership
Preferred skills
Custom ASIC development for external customers, Circuit and logic design background, 7nm and below process technology delivery, Architecture/Front-end/Back-end tradeoffs
Technologies
EDA tools (P&R, Timing, Physical verification), 7nm process nodes
Responsibilities
Drive floorplanning and physical design flows for best-in-class ASIC solutions, Evaluate IP choices and analyze die size, Provide expert guidance to physical design execution teams, Lead a small team of high-performing individuals
Seniority
Senior, hands-on IC with team leadership
