Lead DFT DV Engineer
Core
Lead DFT DV Engineer responsible for developing scalable verification platforms and driving test implementation for AMD's next-gen processors and AI technologies.
Role type
Senior IC DFT/DV Engineer
Builds
Production silicon chips (processors, AI accelerators)
Domain
Semiconductor / Digital Design / Verification
Required skills
System Verilog, UVM, MBIST, JTAG verification, Scan dump, ICL/PDL, Clocking and topology, Multi-die verification, Assertion and checker development
Preferred skills
HSIO tests, Analog observation, Debug scenarios, Design/Arch collaboration
Technologies
System Verilog, UVM
Responsibilities
Develop scalable verification platform in System Verilog / UVM; Guide team in writing assertions and checkers; Prepare test list and complete verification with all planned tests; Responsible for SCAN, MBIST and JTAG verification; Drive implementation of verification tests
Seniority
Senior, hands-on IC
