Sr Silicon Design Verification Engineer
Core
Plan, develop, and execute verification activities for new and existing features within AMD's graphics processor IP to ensure high-quality silicon.
Role type
Senior Silicon Design Verification Engineer
Builds
Graphics processor IP
Domain
Semiconductor / Graphics / ASIC
Required skills
UVM, SystemVerilog, Verilog, C++, C, Perl, Ruby, shell scripting, Linux, graphics pipeline architecture, directed testing, constrained-random testing, coverage analysis, debugging RTL and firmware
Preferred skills
IP-level ASIC verification, UVM-based verification frameworks, automation in distributed compute environments, simulation profiling, HLS tools, video codec technologies, technical mentorship
Technologies
UVM, SystemVerilog, Verilog, C++, C, Perl, Ruby, SystemC, TLM, Linux, Windows
Responsibilities
Collaborate with architecture, hardware, and firmware teams to understand and verify new feature requirements; Develop verification test plans accounting for hardware, firmware, software drivers, and system-level use cases; Estimate effort for verification development including test creation and environment updates; Develop directed and constrained-random verification tests; Debug test failures, identify root causes, and partner with RTL and firmware engineers to resolve issues; Review functional and code coverage metrics to enhance verification content; Contribute to verification methodology improvements for quality, efficiency, and scalability
Seniority
Senior, hands-on IC
