CareerPlan

Prinicipal Signal Integrity Engineer

San Jose, CaliforniaFull-time2026-09-28 → 2026-10-22
No visa sponsorship

Core

Ensuring industry-leading reliability, performance, and efficiency for AMD's next-generation products by analyzing, modeling, and validating complex high-speed interconnects.

Role type

Principal Signal Integrity Engineer (High-Speed Interconnects)

Builds

Next-gen processors, AI systems, and high-speed data infrastructure

Domain

Semiconductor / High-Speed Digital Design

Required skills

High-speed signal integrity engineering, SerDes channel analysis, IBIS-AMI modeling, SPICE simulation, full-wave EM analysis, PCB stack-up design, transmission line routing, Eye Diagram optimization, Bit Error Rate (BER) analysis, Signal-Noise-Ratio (SNR) optimization, TDR/VNA testing, MATLAB/Python scripting

Preferred skills

Keysight ADS, Cadence Sigrity, Ansys HFSS, PCIe/Ethernet/DDR interface knowledge, IC packaging expertise, cross-functional collaboration

Technologies

Keysight ADS, Cadence Sigrity, Ansys HFSS, IBIS-AMI, SPICE, TDR, VNA, PCIe, Ethernet, DDR, LPDDR

Responsibilities

Model and simulate end-to-end high-speed channels (transceivers, IC package, PCB, connectors), perform time/frequency domain SI analysis, identify and resolve link quality issues (loss, reflection, crosstalk), optimize signaling parameters, provide design guidelines for board layout and materials, review PCB layouts for SI/PI issues, support lab validation and debugging

Seniority

Principal, hands-on IC