Sr Solutions Engineer-FPGA/PCIe
Core
Architect and develop hardware/software co-design solutions for ASIC/FPGA-based acceleration engines and embedded software for networking, storage, automotive, aerospace, and AI/ML workloads.
Role type
Senior IC FPGA/ASIC hardware engineer (RTL design & validation)
Builds
High-performance hardware acceleration engines and embedded software for next-generation compute platforms
Domain
Semiconductor hardware design (ASIC/FPGA) and high-speed interface protocols
Deliverable
production ML models | product features
Required skills
SystemVerilog/Verilog, RTL design, PCIe (Gen 6/7), CXL, UAL, Ethernet, DDR5/6, UVM verification, emulation platforms, Python/Tcl/Shell scripting
Preferred skills
ASIC/FPGA hands-on experience, synchronous design, timing closure, hardware debugging, Vivado ecosystem
Technologies
SystemVerilog, Verilog, Vivado, Palladium, Protium, Zebu, PCIe, CXL, UAL, Ethernet, DDR5/6
Responsibilities
Design, verify, and validate high-performance logic for data/control paths; Integrate custom IP with subsystems using standard ASIC flows; Perform pre-silicon verification and emulation; Lead post-silicon bring-up and validation; Debug complex hardware/software interactions
Seniority
Senior, hands-on IC
