Interconnect Performance Engineer
Core
Define and deliver next-generation Fabric Interconnects providing low latency, high efficiency connectivity to the memory system across AMD's Data Center, Gaming, Client, and Semi-Custom product lines.
Role type
Senior IC hardware performance engineer (interconnect/memory system)
Builds
Next-gen Infinity Fabric Interconnects for AMD SoCs
Domain
Semiconductor hardware design, interconnect, and memory systems
Required skills
RTL performance analysis and verification, hardware simulation/emulation, system-level performance debug, memory system architecture, multiprocessor coherency, Verilog, SystemVerilog, C/C++, Python/Perl scripting
Preferred skills
Simulation testbench development, CPU/GPU/I/O workload debugging, debug infrastructure/tooling development, AI-based tool automation
Technologies
Verilog, SystemVerilog, C, C++, Python, Perl, simulation/emulation platforms
Responsibilities
Perform RTL performance analysis and verification for the Infinity Fabric Interconnect, execute performance verification plans at the IP level, debug performance failures and identify design bottlenecks, develop and enhance debug infrastructure and tooling, leverage AI-based tools to improve engineering productivity
Seniority
Senior, hands-on IC
