Senior Physical Design Engineer - Server SoC & Chiplet Implementation
Core
Plan, build, and execute physical design for complex Chiplets in Server SoC at advanced technology nodes.
Role type
Senior Physical Design Engineer (Chiplet/SoC)
Builds
Server SoC chiplets and large design blocks
Domain
Semiconductor / VLSI Design
Required skills
Block-level and top-level physical implementation, Synthesis, Place and Route (P&R), Low-power flows (UPF, power-gating), Scripting (Tcl, Perl, sed/awk), Unix/Linux environment, Electrical checks (FM & VSI)
Preferred skills
Multi-voltage designs, Fusion Compiler, ICC2, Innovus, STA, Physical verification, Python, Debug capabilities
Technologies
Fusion Compiler, ICC2, Innovus, UPF, FM, VSI, Tcl, Perl, sed, awk, Python
Responsibilities
Execute synthesis for high-speed designs, Lead Place and Route processes, Analyze design results for optimization, Drive design from concept to tape-out, Collaborate with RTL/Logic designers
Seniority
Senior, hands-on IC
