Senior Functional Verification Engineer (Graphics/Multimedia)
Core
Pre-silicon functional verification for full-chip, blocks, multi-chip, and system-level ASIC designs within the Client/Graphics Group.
Role type
Senior IC silicon design verification engineer
Builds
ASIC chips for graphics and multimedia applications
Domain
Semiconductor / ASIC Design
Required skills
ASIC design flow, SOC architecture, SystemVerilog, Verilog, SystemC, coverage-based verification, constrained random generation, debug skills, C/C++, Perl, shell scripting
Preferred skills
Low power verification (NLP/UPF), emulation, mentoring junior engineers
Technologies
SystemVerilog, Verilog, SystemC, Perl, shell scripts
Responsibilities
Develop complex verification environments with coverage/assertions, specify design verification plans at SOC/IP level, perform pre-silicon verification, debug functional simulations, mentor junior team members
Seniority
Senior, hands-on IC
