CPU Architecture and RTL Design
Core
Design functional units and RTL for next-generation CPU cores, focusing on cache subsystems and related logic.
Role type
Senior IC CPU MicroArchitect / RTL Design Engineer
Builds
Next-generation high-performance processor cores for AMD's CPU roadmap
Domain
Semiconductor / CPU Design
Required skills
RTL design and coding, CPU microarchitecture, Cache design, Logic design, Synthesis, Timing closure, Power reduction techniques, Physical design awareness, Post-silicon debug
Preferred skills
Clean-sheet design to tape-out experience, Patents or publications in microarchitecture, Strong problem-solving and debugging skills
Technologies
Industry-standard RTL tools, Synthesis tools, Verification tools
Responsibilities
Execute RTL design for cache and pipeline sections, Collaborate on high-level architecture definition, Participate in microarchitecture definition, Contribute to verification, synthesis, and timing convergence, Provide post-silicon support
Seniority
Senior, hands-on IC
