Physical Design Engineer
Core
Design high-speed communication chips (Networking Silicon) focusing on power, area, and performance optimization.
Role type
Senior IC physical design engineer
Builds
High-speed communication devices (chips)
Domain
Semiconductor / Networking Silicon
Required skills
Physical design flows (PNR, STA, physical verification), RTL2GDS development, timing closure, power and noise analysis, physical verification (LVS/DRC), EDA tools (Synopsys, Cadence)
Preferred skills
Experience with high cell count and high-speed (HS) blocks, inflows development
Technologies
Synopsys, Cadence
Responsibilities
Perform physical design of blocks under challenging constraints; Resolve complex timing and congestion problems; Execute full RTL2GDS chip development flow (synthesis, place and route, timing closure, power and noise analysis, physical verification); Participate in inflows development.
