ASIC Design Engineer, BOOT and Power Management
Core
Designing and implementing the micro-architecture and RTL for BOOT and Power Management subsystems in next-generation automotive and client chips.
Role type
Senior IC ASIC Design Engineer (BOOT and Power Management)
Builds
Next-generation GPU and SoC chips for automotive and client markets
Domain
Semiconductor / ASIC Design / Power Management
Required skills
RTL design, digital design fundamentals, micro-architecture, timing closure, silicon validation support, system security architecture knowledge
Preferred skills
Security standards and protocols knowledge, cross-cultural collaboration, debugging, analytical problem solving
Technologies
RTL, VLSI, Physical design tools
Responsibilities
Own micro-architecture and RTL development of design modules, Micro-architect features to meet performance, power and area requirements, Work with HW architects to define critical features, Work with verification teams to verify the correctness of implemented features, Partner with timing, VLSI and Physical design teams to ensure design meets timing, interface requirements and is routable
Seniority
Mid-level, hands-on IC
