CareerPlan

Power Analysis and Optimization Engineer - New College Graduate 2027

China, ShanghaiFull-time2026-10-23 → 2026-11-10

Core

Develop IP-level power models, analyze power consumption across workloads, and implement optimizations to improve performance per watt for NVIDIA GPU and SoC products.

Role type

IC power analysis and optimization engineer (ASIC)

Builds

Energy-efficient GPU and SoC designs

Domain

Semiconductor / ASIC design

Deliverable

production ML models

Required skills

Digital circuit design, Computer architecture, ASIC design methodology, Power-consumption fundamentals, Low-power design techniques, Python/C++/Tcl scripting, Power modeling, Workload analysis, Power attribution, PPA tradeoff analysis

Preferred skills

ASIC power-analysis tools (PrimeTime PX, PowerArtist), AI-assisted automation workflows, AI agent development

Technologies

Python, C++, Tcl, PrimeTime PX, PowerArtist

Responsibilities

Develop IP-level power models to estimate impact of architectural changes; Analyze power consumption across different workloads and application scenarios; Collaborate with architects to define power targets and evaluate PPA tradeoffs; Use internal and industry-standard tools to identify power inefficiencies; Work with RTL and physical-design teams to implement and validate power optimizations; Investigate power regressions and determine root causes; Develop scripts, automation flows, and AI-assisted solutions to improve efficiency and scalability; Explore new methodologies for power modeling, analysis, attribution, and optimization.