Senior Verification Engineer, PCIE
Core
Verify the design and implementation of next-generation PCI Express controllers for GPUs and SOCs using state-of-the-art verification methodologies.
Role type
Senior IC verification engineer (PCI Express)
Builds
ASIC designs, golden models, and micro-architecture for IP/sub-system levels
Domain
Semiconductor hardware verification, interconnect protocols
Required skills
UVM, Verilog, SystemVerilog, functional coverage, constrained random verification, IP/interconnect protocol verification, ASIC design verification, test plan development, verification infrastructure design
Preferred skills
PCI Express Gen3+, CXL-based system architecture, Perl/Python scripting, debugging, analytical skills
Technologies
UVM, Verilog, SystemVerilog, Perl, Python
Responsibilities
Verify ASIC design, architecture, golden models, and micro-architecture of PCIE controllers; Build reusable bus functional models, monitors, checkers, and scoreboards; Define verification scope, develop test plans, tests, and verification infrastructure; Collaborate with architects, designers, and pre/post silicon verification teams
Seniority
Senior, hands-on IC
