Senior Software R&D Engineer, ECO Route - VLSI EDA
Core
Invent next-generation detailed physical design algorithms for ECO routing and physical optimization to enable extreme timing and power optimization in AI hardware.
Role type
Senior IC software R&D engineer (VLSI EDA)
Builds
Internal EDA technology for detailed routing, incremental logic synthesis, and cross-domain optimization tools.
Domain
Semiconductor / VLSI EDA / AI Hardware
Deliverable
production ML models | product features
Required skills
C++, high-performance software architecture, detailed routing algorithms, DRC-aware implementation, clock distribution, DFT, power delivery
Preferred skills
Logic and physical co-optimization, SAT solvers, placement, legalization, IR drop reduction, machine learning (LLMs, RL, GNNs)
Technologies
C++, SAT solvers, LLMs, reinforcement learning, GNNs
Responsibilities
Develop incremental physical-design technology for high-performance logic changes; Invent improved detailed-routing algorithms for discrete and continuous optimization problems; Craft cross-domain optimization tools; Own problems end-to-end from algorithm invention to production deployment.
Seniority
Senior, hands-on IC
